[cryptography] Intel RNG

coderman coderman at gmail.com
Tue Jun 19 14:59:07 EDT 2012

On Tue, Jun 19, 2012 at 9:02 AM,  <dj at deadhat.com> wrote:
> It is not using AES-NI. It is a self contained unit on chip with a built
> in HW AES encrypt block cipher.

thanks for the clarification; is this documented somewhere? i am
curious if the die space consumed for two implementations of AES in
negligable on these very large cores, or if there is another reason to
intentionally keep them separate.

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