coderman at gmail.com
Sat May 9 05:07:55 EDT 2015
On 5/8/15, coderman <coderman at gmail.com> wrote:
> has there been consideration of a processor instruction for hardware
> implementation resistant to timing attacks?
to answer my own question, SIMD like NEON on ARM cores
appears to be plenty sufficient, if you code the rest accommodating.
e.g. performing independent operations together:
where independent operations together is independent data single instruction.
More information about the cryptography